TY - GEN
T1 - What Cannot Be Implemented on Weak Memory?
AU - Castañeda, Armando
AU - Chockler, Gregory
AU - Dongol, Brijesh
AU - Lahav, Ori
N1 - Publisher Copyright:
© Armando Castañeda, Gregory Chockler, Brijesh Dongol, and Ori Lahav.
PY - 2024/10/24
Y1 - 2024/10/24
N2 - We present a general methodology for establishing the impossibility of implementing certain concurrent objects on different (weak) memory models. The key idea behind our approach lies in characterizing memory models by their mergeability properties, identifying restrictions under which independent memory traces can be merged into a single valid memory trace. In turn, we show that the mergeability properties of the underlying memory model entail similar mergeability requirements on the specifications of objects that can be implemented on that memory model. We demonstrate the applicability of our approach to establish the impossibility of implementing standard distributed objects with different restrictions on memory traces on three memory models: strictly consistent memory, total store order, and release-acquire. These impossibility results allow us to identify tight and almost tight bounds for some objects, as well as new separation results between weak memory models, and between well-studied objects based on their implementability on weak memory models.
AB - We present a general methodology for establishing the impossibility of implementing certain concurrent objects on different (weak) memory models. The key idea behind our approach lies in characterizing memory models by their mergeability properties, identifying restrictions under which independent memory traces can be merged into a single valid memory trace. In turn, we show that the mergeability properties of the underlying memory model entail similar mergeability requirements on the specifications of objects that can be implemented on that memory model. We demonstrate the applicability of our approach to establish the impossibility of implementing standard distributed objects with different restrictions on memory traces on three memory models: strictly consistent memory, total store order, and release-acquire. These impossibility results allow us to identify tight and almost tight bounds for some objects, as well as new separation results between weak memory models, and between well-studied objects based on their implementability on weak memory models.
KW - Impossibility
KW - Release-Acquire
KW - Total-Store Order
KW - Weak Memory Models
UR - http://www.scopus.com/inward/record.url?scp=85208444034&partnerID=8YFLogxK
U2 - 10.4230/LIPIcs.DISC.2024.11
DO - 10.4230/LIPIcs.DISC.2024.11
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AN - SCOPUS:85208444034
T3 - Leibniz International Proceedings in Informatics, LIPIcs
BT - 38th International Symposium on Distributed Computing, DISC 2024
A2 - Alistarh, Dan
PB - Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing
T2 - 38th International Symposium on Distributed Computing, DISC 2024
Y2 - 28 October 2024 through 1 November 2024
ER -