TY - JOUR
T1 - Using the MSET Device to Counteract Power-Analysis Attacks
AU - Peled, Assaf
AU - David, Liron
AU - Amrani, Ofer
AU - Rosenwaks, Yossi
AU - Wool, Avishai
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2020
Y1 - 2020
N2 - One pivotal countermeasure in dealing with side-channel power analysis attacks is to maintain the signal-to-noise ratio of the power readings associated with the target as data-independent and as low as possible, in order to limit the attacker's ability to deduce meaningful information from the target. The following study shows that the MSET (Multiple-State Electrostatically-Formed Nanowire Transistor) device achieves these two desired outcomes by virtue of its low-power characteristics, therefore having an inherent advantage in terms of side channel attacks over prevalent technologies. This advantage is tested with an SRAM cell and a memory register. Using correlation metrics, the correlation coefficient of the Hamming distance to the power dissipation in the register - at the adversary's point of observation - is shown to be close to zero over multiple power traces, when the register is implemented in MSET technology.
AB - One pivotal countermeasure in dealing with side-channel power analysis attacks is to maintain the signal-to-noise ratio of the power readings associated with the target as data-independent and as low as possible, in order to limit the attacker's ability to deduce meaningful information from the target. The following study shows that the MSET (Multiple-State Electrostatically-Formed Nanowire Transistor) device achieves these two desired outcomes by virtue of its low-power characteristics, therefore having an inherent advantage in terms of side channel attacks over prevalent technologies. This advantage is tested with an SRAM cell and a memory register. Using correlation metrics, the correlation coefficient of the Hamming distance to the power dissipation in the register - at the adversary's point of observation - is shown to be close to zero over multiple power traces, when the register is implemented in MSET technology.
KW - MSET
KW - low-power transistors
KW - power-analysis attacks
KW - side-channel attacks
UR - http://www.scopus.com/inward/record.url?scp=85096211853&partnerID=8YFLogxK
U2 - 10.1109/JEDS.2020.3032635
DO - 10.1109/JEDS.2020.3032635
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AN - SCOPUS:85096211853
SN - 2168-6734
VL - 8
SP - 1328
EP - 1334
JO - IEEE Journal of the Electron Devices Society
JF - IEEE Journal of the Electron Devices Society
M1 - 9233387
ER -