Using the MSET Device to Counteract Power-Analysis Attacks

Assaf Peled, Liron David, Ofer Amrani, Yossi Rosenwaks, Avishai Wool

Research output: Contribution to journalArticlepeer-review


One pivotal countermeasure in dealing with side-channel power analysis attacks is to maintain the signal-to-noise ratio of the power readings associated with the target as data-independent and as low as possible, in order to limit the attacker's ability to deduce meaningful information from the target. The following study shows that the MSET (Multiple-State Electrostatically-Formed Nanowire Transistor) device achieves these two desired outcomes by virtue of its low-power characteristics, therefore having an inherent advantage in terms of side channel attacks over prevalent technologies. This advantage is tested with an SRAM cell and a memory register. Using correlation metrics, the correlation coefficient of the Hamming distance to the power dissipation in the register - at the adversary's point of observation - is shown to be close to zero over multiple power traces, when the register is implemented in MSET technology.

Original languageEnglish
Article number9233387
Pages (from-to)1328-1334
Number of pages7
JournalIEEE Journal of the Electron Devices Society
StatePublished - 2020


  • MSET
  • low-power transistors
  • power-analysis attacks
  • side-channel attacks


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