Ultra-fast characterization of transient gate oxide trapping in SiC MOSFETs

M. Gurfinkel*, J. Suehle, J. B. Bernstein, Yoram Shapira, A. J. Lelis, D. Habersat, N. Goldsman

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

One of the most important issues that limits the performance and reliability of SiC power MOSFETs is the threshold voltage and drain current instability under normal operation conditions. This phenomenon has been recently studied using conventional dc measurements. In this work, we studied the threshold voltage and drain current instability in state-of-the-art 4H-SiC MOSFETs using fast I- V measurements. Fast I- V measurements reveal the full extent of the instability, underestimated by the dc measurements. Furthermore, fast measurements allow the separation of negative and positive bias stress effects. Post oxidation annealing in NO was found to passivate the oxide traps and dramatically reduce instability. A physical model involving fast transient charge trapping and detrapping at and near the SiC/SiO2 interface is proposed.

Original languageEnglish
Title of host publication2007 IEEE International Reliability Physics Symposium Proceedings, 45th Annual
Pages462-466
Number of pages5
DOIs
StatePublished - 2007
Event45th Annual IEEE International Reliability Physics Symposium 2007, IRPS - Phoenix, AZ, United States
Duration: 15 Apr 200719 Apr 2007

Publication series

NameAnnual Proceedings - Reliability Physics (Symposium)
ISSN (Print)0099-9512

Conference

Conference45th Annual IEEE International Reliability Physics Symposium 2007, IRPS
Country/TerritoryUnited States
CityPhoenix, AZ
Period15/04/0719/04/07

Keywords

  • Post oxidation annealing
  • Silicon carbide
  • Threshold voltage instability

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