TY - JOUR
T1 - The velox transactional memory stack
AU - Afek, Yehuda
AU - Drepper, Ulrich
AU - Felber, Pascal
AU - Fetzer, Christof
AU - Gramoli, Vincent
AU - Hohmuth, Michael
AU - Riviere, Etienne
AU - Stenstrom, Per
AU - Unsal, Osman
AU - Moreira, Walther Maldonado
AU - Harmanci, Derin
AU - Marlier, Patrick
AU - Diestelhorst, Stephan
AU - Pohlack, Martin
AU - Cristal, Adrian
AU - Hur, Ibrahim
AU - Dragojevic, Aleksandar
AU - Guerraoui, Rachid
AU - Kapalka, Michal
AU - Tomić, Saša
AU - Korland, Guy
AU - Shavit, Nir
AU - Nowack, Martin
AU - Riegel, Torvald
N1 - Funding Information:
We thank Gina Alioto and Javier Arias for their support and involvement in the VELOX project. The research leading to the results presented in this article received funding from the European Community’s Seventh Framework Programme (FP7/2007-2013) under grant agreement No 216852.
PY - 2010/9
Y1 - 2010/9
N2 - The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.
AB - The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.
UR - http://www.scopus.com/inward/record.url?scp=78649504920&partnerID=8YFLogxK
U2 - 10.1109/MM.2010.80
DO - 10.1109/MM.2010.80
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AN - SCOPUS:78649504920
SN - 0272-1732
VL - 30
SP - 76
EP - 87
JO - IEEE Micro
JF - IEEE Micro
IS - 5
M1 - 5567088
ER -