TY - GEN
T1 - Synthesis of ASM-based self-checking controllers
AU - Levin, I.
AU - Sinelnikov, V.
AU - Karpovsky, M.
N1 - Publisher Copyright:
© 2001 IEEE.
PY - 2001
Y1 - 2001
N2 - In this paper we present a new technique for on-line checking of FPGA-based sequential devices defined by their algorithmic state machines (ASMs). The technique utilizes specific properties of ASMs for achieving the totally self-checking goal with a low hardware overhead. This technique is based on the architecture that consists of two portions: a self-checking sequential device and a separate totally self-checking (TSC) checker. Each of these portions is implemented as a combination of an "evolution" block and an "execution" block. Comparison of code vectors transferred between these blocks provides for the totally self-checking property. The proposed technique does not require any redundant encoding of output words and uses a one-rail design, thereby drastically decreasing the required overhead. The paper presents overhead estimations and results for benchmarks for the proposed architecture.
AB - In this paper we present a new technique for on-line checking of FPGA-based sequential devices defined by their algorithmic state machines (ASMs). The technique utilizes specific properties of ASMs for achieving the totally self-checking goal with a low hardware overhead. This technique is based on the architecture that consists of two portions: a self-checking sequential device and a separate totally self-checking (TSC) checker. Each of these portions is implemented as a combination of an "evolution" block and an "execution" block. Comparison of code vectors transferred between these blocks provides for the totally self-checking property. The proposed technique does not require any redundant encoding of output words and uses a one-rail design, thereby drastically decreasing the required overhead. The paper presents overhead estimations and results for benchmarks for the proposed architecture.
UR - http://www.scopus.com/inward/record.url?scp=84969546665&partnerID=8YFLogxK
U2 - 10.1109/DSD.2001.952122
DO - 10.1109/DSD.2001.952122
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AN - SCOPUS:84969546665
T3 - Proceedings - Euromicro Symposium on Digital Systems Design: Architectures, Methods and Tools, DSD 2001
SP - 87
EP - 93
BT - Proceedings - Euromicro Symposium on Digital Systems Design
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 4 September 2001 through 6 September 2001
ER -