Synthesis of ASM-based self-checking controllers

I. Levin, V. Sinelnikov, M. Karpovsky

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper we present a new technique for on-line checking of FPGA-based sequential devices defined by their algorithmic state machines (ASMs). The technique utilizes specific properties of ASMs for achieving the totally self-checking goal with a low hardware overhead. This technique is based on the architecture that consists of two portions: a self-checking sequential device and a separate totally self-checking (TSC) checker. Each of these portions is implemented as a combination of an "evolution" block and an "execution" block. Comparison of code vectors transferred between these blocks provides for the totally self-checking property. The proposed technique does not require any redundant encoding of output words and uses a one-rail design, thereby drastically decreasing the required overhead. The paper presents overhead estimations and results for benchmarks for the proposed architecture.

Original languageEnglish
Title of host publicationProceedings - Euromicro Symposium on Digital Systems Design
Subtitle of host publicationArchitectures, Methods and Tools, DSD 2001
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages87-93
Number of pages7
ISBN (Electronic)0769512399, 9780769512396
DOIs
StatePublished - 2001
EventEuromicro Symposium on Digital Systems Design, DSD 2001 - Warsaw, Poland
Duration: 4 Sep 20016 Sep 2001

Publication series

NameProceedings - Euromicro Symposium on Digital Systems Design: Architectures, Methods and Tools, DSD 2001

Conference

ConferenceEuromicro Symposium on Digital Systems Design, DSD 2001
Country/TerritoryPoland
CityWarsaw
Period4/09/016/09/01

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