TY - JOUR
T1 - Synchronverters With Fast Current Loops
AU - Kustanovich, Zeev
AU - Shivratri, Shivprasad
AU - Yin, Hang
AU - Reissner, Florian
AU - Weiss, George
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2023/11/1
Y1 - 2023/11/1
N2 - Virtual synchronous machines (VSMs) are inverters that behave toward the power-grid-like synchronous generators. Hence, they can be used as grid-forming inverters, and they can support the grid with inertia, droops, fault ride-through, and more. Synchronverters are a much studied type of VSMs. In this article, we present several improvements and innovations to the synchronverter control algorithm. We offer a complete design procedure for this algorithm. One change is meant to mitigate the fact that earlier designs are very sensitive to grid voltage measurement errors and processing delay, which may cause harmonic distortion and fluctuating amplitude of the grid-side currents. We propose to include a fast current controller as the internal control loop of the inverter. The design of this current controller involves delicate issues of compensating the delays and eliminating the dc components of the currents. The new design also enables a natural way for distortionless current limitation. We present a smooth start-up procedure.
AB - Virtual synchronous machines (VSMs) are inverters that behave toward the power-grid-like synchronous generators. Hence, they can be used as grid-forming inverters, and they can support the grid with inertia, droops, fault ride-through, and more. Synchronverters are a much studied type of VSMs. In this article, we present several improvements and innovations to the synchronverter control algorithm. We offer a complete design procedure for this algorithm. One change is meant to mitigate the fact that earlier designs are very sensitive to grid voltage measurement errors and processing delay, which may cause harmonic distortion and fluctuating amplitude of the grid-side currents. We propose to include a fast current controller as the internal control loop of the inverter. The design of this current controller involves delicate issues of compensating the delays and eliminating the dc components of the currents. The new design also enables a natural way for distortionless current limitation. We present a smooth start-up procedure.
KW - Current control
KW - frequency droop
KW - inverter
KW - synchronverter
KW - virtual synchronous machine (VSM)
KW - voltage droop
UR - http://www.scopus.com/inward/record.url?scp=85146251504&partnerID=8YFLogxK
U2 - 10.1109/TIE.2022.3229275
DO - 10.1109/TIE.2022.3229275
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AN - SCOPUS:85146251504
SN - 0278-0046
VL - 70
SP - 11357
EP - 11367
JO - IEEE Transactions on Industrial Electronics
JF - IEEE Transactions on Industrial Electronics
IS - 11
ER -