TY - JOUR
T1 - Synchronizing redundant cores in a dynamic DMR multicore architecture
AU - Golander, Amit
AU - Weiss, Shlomo
AU - Ronen, Ronny
PY - 2009
Y1 - 2009
N2 - We introduce the difficulties in processing context switches, exceptions, and interrupts in DMR architectures. We propose ways to address these problems in a dynamic DMR (DDMR) architecture, providing methods that assure both cores detect the event, synchronize it to the same instruction, perform a secure context switch, run correct interrupt service routines, and avoid process termination. DDMR uses a time-division multiplexing (TDM) ring architecture to dynamically connect pairs of cores. We enhance this protocol to include the different message types required to handle interrupts and exceptions. We also propose a more efficient address-based, rather than TDM-based, ring architecture.
AB - We introduce the difficulties in processing context switches, exceptions, and interrupts in DMR architectures. We propose ways to address these problems in a dynamic DMR (DDMR) architecture, providing methods that assure both cores detect the event, synchronize it to the same instruction, perform a secure context switch, run correct interrupt service routines, and avoid process termination. DDMR uses a time-division multiplexing (TDM) ring architecture to dynamically connect pairs of cores. We enhance this protocol to include the different message types required to handle interrupts and exceptions. We also propose a more efficient address-based, rather than TDM-based, ring architecture.
KW - Dual modular redundancy (DMR)
KW - Reliability
KW - Ring
UR - http://www.scopus.com/inward/record.url?scp=67650131378&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2009.2020930
DO - 10.1109/TCSII.2009.2020930
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AN - SCOPUS:67650131378
SN - 1549-7747
VL - 56
SP - 474
EP - 478
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 6
ER -