Study of insulator traps in InSb InSb/ SiO_x /Metal devices

In this study we investigated traps in InSb/ SiO_x /Metal structure. In particular, emphasis was given to various methods of charging and discharging the interfaces and SiO_x layers by thermal-bias-stress. It is shown that the widely used capacitance-voltage profiling is insensitive to trap energies. Thus additional, complementary methods, such as thermally stimulated discharge were adopted and used to deepen the understanding. It is proposed that the traps in the passivation layer are charged by dc leakage current, and that the distribution of trap energies is not uniform. Furthermore, we report here methods that were developed to charge and discharge specific trap levels selectively.