TY - JOUR
T1 - RIDER
T2 - Ring deflection router with buffers
AU - Oxman, Gadi
AU - Weiss, Shlomo
N1 - Publisher Copyright:
© 2014, Springer Science+Business Media New York.
PY - 2014/9/20
Y1 - 2014/9/20
N2 - The network-on-chip is becoming an increasingly important component of chip multiprocessors. Recently bufferless deflection routers were proposed, aiming to reduce hardware cost in comparison to classic virtual channel based routers, by eliminating router buffers. We propose RIDER, a low cost deflection router based on an internal rotating ring structure with minimal number of buffers. We compare RIDER with 16 buffers to a wormhole router with 12 buffers, a virtual channel buffered router with 64 buffers, to CHIPPER, a bufferless deflection router with no buffers, and to MinBD, a buffered deflection router with four buffers.
AB - The network-on-chip is becoming an increasingly important component of chip multiprocessors. Recently bufferless deflection routers were proposed, aiming to reduce hardware cost in comparison to classic virtual channel based routers, by eliminating router buffers. We propose RIDER, a low cost deflection router based on an internal rotating ring structure with minimal number of buffers. We compare RIDER with 16 buffers to a wormhole router with 12 buffers, a virtual channel buffered router with 64 buffers, to CHIPPER, a bufferless deflection router with no buffers, and to MinBD, a buffered deflection router with four buffers.
KW - Deflection routing
KW - NoC
KW - Router architecture
UR - http://www.scopus.com/inward/record.url?scp=84931560571&partnerID=8YFLogxK
U2 - 10.1007/s10617-014-9130-0
DO - 10.1007/s10617-014-9130-0
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AN - SCOPUS:84931560571
SN - 0929-5585
VL - 18
SP - 141
EP - 155
JO - Design Automation for Embedded Systems
JF - Design Automation for Embedded Systems
IS - 3-4
ER -