Recursive design of hardware priority queues

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A recursive and fast construction of an n elements priority queue from exponentially smaller hardware priority queues and size n RAM is presented. All priority queue implementations to date either require O(log n) instructions per operation or exponential (with key size) space or expensive special hardware whose cost and latency dramatically increases with the priority queue size. Hence constructing a priority queue (PQ) from considerably smaller hardware priority queues (which are also much faster) while maintaining the O(1) steps per PQ operation is critical. Here we present such an acceleration technique called the Power Priority Queue (PPQ) technique. Specifically, an n elements PPQ is constructed from 2k - 1 primitive priority queues of size k√n (k = 2, 3,...) and a RAM of size n, where the throughput of the construct beats that of a single, size n primitive hardware priority queue. For example an n elements PQ can be constructed from either three √n or five 3√n primitive H/W priority queues. Applying our technique to a TCAM based priority queue, results in TCAM-PPQ, a scalable perfect line rate fair queuing of millions of concurrent connections at speeds of 100 Gbps. This demonstrates the benefits of our scheme when used with hardware TCAM, we expect similar results with systolic arrays, shiftregisters and similar technologies. As a by product of our technique we present an O (n) time sorting algorithm in a system equipped with a. O (w √n) entries TCAM, where here n is the number of items, and w is the maximum number of bits required to represent an item, improving on a previous result that used an Ω(n) entries TCAM. Finally, we provide a lower bound on the time complexity of sorting n elements with TCAM of size 0(n) that matches our TCAM based sorting algorithm.

Original languageEnglish
Title of host publicationSPAA 2013 - Proceedings of the 25th ACM Symposium on Parallelism in Algorithms and Architectures
PublisherAssociation for Computing Machinery
Pages23-32
Number of pages10
ISBN (Print)9781450315722
DOIs
StatePublished - 2013
Event25th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2013 - Montreal, QC, Canada
Duration: 23 Jul 201325 Jul 2013

Publication series

NameAnnual ACM Symposium on Parallelism in Algorithms and Architectures

Conference

Conference25th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2013
Country/TerritoryCanada
CityMontreal, QC
Period23/07/1325/07/13

Keywords

  • Priority
  • Sorting
  • TCAM

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