TY - GEN
T1 - Prototyping a high-performance low-cost solid-state disk
AU - Budilovsky, Evgeny
AU - Toledo, Sivan
AU - Zuck, Aviad
PY - 2011
Y1 - 2011
N2 - We present a design for a high-performance low-cost solid-state disk (SSD). Ignoring garbage-collection costs, our SSD performs only 1+π physical accesses to NAND flash pages for every request of a page-size block by the host, for some small e. This is true for all access patterns, including random writes, which are usually slow on low-cost SSDs. Garbage collection in all SSDs is determined primarily by how full the SSD is, and its cost is similar in most SSDs. The unique feature in our design is that it achieves high performance even with when the SSD contains only a small amount of RAM. In most SSD designs, this would imply low performance; in ours, it does not. A small RAM lowers the cost of an SSD with a given flash array. Our design achieves high performance with a small RAMusing two innovative ideas. One is the use of a clever mapping data structure. The second is a host-assisted hinting mechanism that uses RAM on the host to compensate for the small amount of RAM within the SSD. This mechanism is implemented as an enhanced SCSI driver (kernel module). Our prototyping methodology is also a significant contribution. We simulate the SSD in software, using files to represent the flash array, but the resulting prototype is a working SCSI device that file systems can be mounted on.
AB - We present a design for a high-performance low-cost solid-state disk (SSD). Ignoring garbage-collection costs, our SSD performs only 1+π physical accesses to NAND flash pages for every request of a page-size block by the host, for some small e. This is true for all access patterns, including random writes, which are usually slow on low-cost SSDs. Garbage collection in all SSDs is determined primarily by how full the SSD is, and its cost is similar in most SSDs. The unique feature in our design is that it achieves high performance even with when the SSD contains only a small amount of RAM. In most SSD designs, this would imply low performance; in ours, it does not. A small RAM lowers the cost of an SSD with a given flash array. Our design achieves high performance with a small RAMusing two innovative ideas. One is the use of a clever mapping data structure. The second is a host-assisted hinting mechanism that uses RAM on the host to compensate for the small amount of RAM within the SSD. This mechanism is implemented as an enhanced SCSI driver (kernel module). Our prototyping methodology is also a significant contribution. We simulate the SSD in software, using files to represent the flash array, but the resulting prototype is a working SCSI device that file systems can be mounted on.
KW - Flash
KW - Hints
KW - Host assisted
KW - ISCSI
KW - NAND flash
KW - Page mapping
UR - http://www.scopus.com/inward/record.url?scp=79960092347&partnerID=8YFLogxK
U2 - 10.1145/1987816.1987834
DO - 10.1145/1987816.1987834
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AN - SCOPUS:79960092347
SN - 9781450307734
T3 - ACM International Conference Proceeding Series
BT - Proceedings of the 4th Annual International Systems and Storage Conference, SYSTOR 2011
T2 - 4th Annual International Systems and Storage Conference, SYSTOR 2011
Y2 - 30 May 2011 through 1 June 2011
ER -