Programming with hardware lock elision

Yehuda Afek*, Amir Levy, Adam Morrison

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We present a simple yet effective technique for improving performance of lock-based code using the hardware lock elision (HLE) feature in Intel's upcoming Haswell processor. We also describe how to extend Haswell's HLE mechanism to achieve a similar effect to our lock elision scheme entirely in hardware.

Original languageEnglish
Title of host publicationPPoPP 2013 - Proceedings of the 2013 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
Pages295-296
Number of pages2
DOIs
StatePublished - 2013
Event18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2013 - Shenzhen, China
Duration: 23 Feb 201327 Feb 2013

Publication series

NameProceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Conference

Conference18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2013
Country/TerritoryChina
CityShenzhen
Period23/02/1327/02/13

Keywords

  • hardware lock elision
  • haswell
  • speculative execution

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