TY - GEN
T1 - Programming with hardware lock elision
AU - Afek, Yehuda
AU - Levy, Amir
AU - Morrison, Adam
PY - 2013
Y1 - 2013
N2 - We present a simple yet effective technique for improving performance of lock-based code using the hardware lock elision (HLE) feature in Intel's upcoming Haswell processor. We also describe how to extend Haswell's HLE mechanism to achieve a similar effect to our lock elision scheme entirely in hardware.
AB - We present a simple yet effective technique for improving performance of lock-based code using the hardware lock elision (HLE) feature in Intel's upcoming Haswell processor. We also describe how to extend Haswell's HLE mechanism to achieve a similar effect to our lock elision scheme entirely in hardware.
KW - hardware lock elision
KW - haswell
KW - speculative execution
UR - http://www.scopus.com/inward/record.url?scp=84875147155&partnerID=8YFLogxK
U2 - 10.1145/2442516.2442552
DO - 10.1145/2442516.2442552
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AN - SCOPUS:84875147155
SN - 9781450319225
T3 - Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP
SP - 295
EP - 296
BT - PPoPP 2013 - Proceedings of the 2013 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
T2 - 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2013
Y2 - 23 February 2013 through 27 February 2013
ER -