Parallel multithreaded satisfiability solver: Design and implementation

Yulik Feldman, Nachum Dershowitz, Ziyad Hanna

Research output: Contribution to journalConference articlepeer-review

Abstract

We describe the design and implementation of a highly optimized, multithreaded algorithm for the propositional satisfiability problem. The algorithm is based on the Davis-Putnam-Logemann-Loveland sequential algorithm, but includes many of the optimization techniques introduced in recent years. We provide experimental results for the execution of the parallel algorithm on a variety of multiprocessor machines with shared memory architecture. In particular, the detrimental effect of parallel execution on the performance of processor cache is studied.

Original languageEnglish
Pages (from-to)75-90
Number of pages16
JournalElectronic Notes in Theoretical Computer Science
Volume128
Issue number3
DOIs
StatePublished - 19 Apr 2005
EventProceedings of the 3rd International Workshop on Parallel Distributed Methods in Verification (PDMC 2004) -
Duration: 4 Sep 20044 Sep 2004

Keywords

  • Satisfiability parallel multithreaded DPLL cache performance

Fingerprint

Dive into the research topics of 'Parallel multithreaded satisfiability solver: Design and implementation'. Together they form a unique fingerprint.

Cite this