Non volatile memory for FPGA booting in space

A. Arbat; C. Calligaro; V. Dayan; E. Pikhay; Y. Roizin

doi:10.1109/AHS.2013.6604247

Non volatile memory for FPGA booting in space

A. Arbat, C. Calligaro, V. Dayan, E. Pikhay, Y. Roizin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper proposes a new non-volatile memory (NVM) architecture that would increase the radiation hardness of standard design. The memory allows storing the configuration bit-stream for on-satellites FPGAs reducing the necessity of information exchange with ground control to recover the system. A 1Mbit non-volatile memory prototype has been fabricated using a standard 180nm CMOS process using a Tower Semiconductors proprietary S-Flash cell.

Original language	English
Title of host publication	Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013
Pages	204-208
Number of pages	5
DOIs	https://doi.org/10.1109/AHS.2013.6604247
State	Published - 2013
Externally published	Yes
Event	2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013 - Turin, Italy Duration: 25 Jun 2013 → 27 Jun 2013

Publication series

Name	Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013

Conference

Conference	2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013
Country/Territory	Italy
City	Turin
Period	25/06/13 → 27/06/13

Keywords

FPGA rebboting
Non-volatile memory
Radiation-hardening by design
S-Flash
semiconductor memory

Access to Document

10.1109/AHS.2013.6604247

Cite this

@inproceedings{1729910f9a694a4aa416ad0db2deab59,

title = "Non volatile memory for FPGA booting in space",

abstract = "This paper proposes a new non-volatile memory (NVM) architecture that would increase the radiation hardness of standard design. The memory allows storing the configuration bit-stream for on-satellites FPGAs reducing the necessity of information exchange with ground control to recover the system. A 1Mbit non-volatile memory prototype has been fabricated using a standard 180nm CMOS process using a Tower Semiconductors proprietary S-Flash cell.",

keywords = "FPGA rebboting, Non-volatile memory, Radiation-hardening by design, S-Flash, semiconductor memory",

author = "A. Arbat and C. Calligaro and V. Dayan and E. Pikhay and Y. Roizin",

year = "2013",

doi = "10.1109/AHS.2013.6604247",

language = "אנגלית",

isbn = "9781467363839",

series = "Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013",

pages = "204--208",

booktitle = "Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013",

note = "null ; Conference date: 25-06-2013 Through 27-06-2013",

}

Arbat, A, Calligaro, C, Dayan, V, Pikhay, E & Roizin, Y 2013, Non volatile memory for FPGA booting in space. in Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013., 6604247, Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013, pp. 204-208, 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013, Turin, Italy, 25/06/13. https://doi.org/10.1109/AHS.2013.6604247

Non volatile memory for FPGA booting in space. / Arbat, A.; Calligaro, C.; Dayan, V.; Pikhay, E.; Roizin, Y.

Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013. 2013. p. 204-208 6604247 (Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Non volatile memory for FPGA booting in space

AU - Arbat, A.

AU - Calligaro, C.

AU - Dayan, V.

AU - Pikhay, E.

AU - Roizin, Y.

PY - 2013

Y1 - 2013

N2 - This paper proposes a new non-volatile memory (NVM) architecture that would increase the radiation hardness of standard design. The memory allows storing the configuration bit-stream for on-satellites FPGAs reducing the necessity of information exchange with ground control to recover the system. A 1Mbit non-volatile memory prototype has been fabricated using a standard 180nm CMOS process using a Tower Semiconductors proprietary S-Flash cell.

AB - This paper proposes a new non-volatile memory (NVM) architecture that would increase the radiation hardness of standard design. The memory allows storing the configuration bit-stream for on-satellites FPGAs reducing the necessity of information exchange with ground control to recover the system. A 1Mbit non-volatile memory prototype has been fabricated using a standard 180nm CMOS process using a Tower Semiconductors proprietary S-Flash cell.

KW - FPGA rebboting

KW - Non-volatile memory

KW - Radiation-hardening by design

KW - S-Flash

KW - semiconductor memory

UR - http://www.scopus.com/inward/record.url?scp=84885396120&partnerID=8YFLogxK

U2 - 10.1109/AHS.2013.6604247

DO - 10.1109/AHS.2013.6604247

M3 - ???researchoutput.researchoutputtypes.contributiontobookanthology.conference???

AN - SCOPUS:84885396120

SN - 9781467363839

T3 - Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013

SP - 204

EP - 208

BT - Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013

Y2 - 25 June 2013 through 27 June 2013

ER -

Non volatile memory for FPGA booting in space

Abstract

Publication series

Conference

Keywords

Access to Document

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