TY - GEN
T1 - Multiple priority, per flow, dual GCRA rate controller for ATM switches
AU - Hagai, Avi
AU - Patt-Shamir, Boaz
PY - 2001
Y1 - 2001
N2 - We propose a rate controller for ATM switches. The rate controller supports multiple priorities, and dual leaky bucket (GCRA) traffic descriptors (such as VBR). While regulating each stream independently, our rate controller requires relatively modest computation bandwidth so that it can be implemented without any additional special-purpose hardware. The memory space requirement under reasonable circumstances is close to the most space-efficient schemes. It also enjoys the important advantage of being decoupled from the link scheduler. We analyze the outgoing traffic characteristics of our shaper with combination of strict priority and WFQ link scheduler, and find the optimal shaping parameters so as to maintain conformance at downstream switches. We study the best ways to allocate resources to rate controllers along the path of connection, and demonstrate the effectiveness of aggressive and light shaping in a multiple stage network under various network loads.
AB - We propose a rate controller for ATM switches. The rate controller supports multiple priorities, and dual leaky bucket (GCRA) traffic descriptors (such as VBR). While regulating each stream independently, our rate controller requires relatively modest computation bandwidth so that it can be implemented without any additional special-purpose hardware. The memory space requirement under reasonable circumstances is close to the most space-efficient schemes. It also enjoys the important advantage of being decoupled from the link scheduler. We analyze the outgoing traffic characteristics of our shaper with combination of strict priority and WFQ link scheduler, and find the optimal shaping parameters so as to maintain conformance at downstream switches. We study the best ways to allocate resources to rate controllers along the path of connection, and demonstrate the effectiveness of aggressive and light shaping in a multiple stage network under various network loads.
UR - http://www.scopus.com/inward/record.url?scp=0035785848&partnerID=8YFLogxK
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AN - SCOPUS:0035785848
SN - 0780367111
T3 - 2001 IEEE Workshop on High Performance Switching and Routing
SP - 169
EP - 174
BT - 2001 IEEE Workshop on High Performance Switching and Routing
T2 - 2001 IEEE Workshop on High Performance Switching and Routing
Y2 - 29 May 2001 through 31 May 2001
ER -