Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing

L. Danial; V. Gupta; E. Pikhay; Y. Roizin; S. Kvatinsky

doi:10.23919/DATE48585.2020.9116354

Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing

L. Danial, V. Gupta, E. Pikhay, Y. Roizin, S. Kvatinsky

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Memristive technology is still not mature enough for the very large-scale integration necessary to obtain practical value from neuromorphic computing. While nonvolatile floating-gate synapse transistors have been implemented in very large-scale integrated neuromorphic systems, their large footprint still constrains an upper bound on the overall performance. A two-terminal floating-gate memristive device can combine the technological maturity of the floating-gate transistor and the conceptual novelty of the memristor using a standard CMOS process. In this paper, we present a top-down computer aided design framework of the floating-gate memristive device and show its potential in neuromorphic computing. Our framework includes a Verilog-A model, small-signal schematics, a stochastic model, Monte-Carlo simulations, layout, DRC, LVS, and RC extraction.

Original language	English
Title of host publication	Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
Editors	Giorgio Di Natale, Cristiana Bolchini, Elena-Ioana Vatajelu
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	472-477
Number of pages	6
ISBN (Electronic)	9783981926347
DOIs	https://doi.org/10.23919/DATE48585.2020.9116354
State	Published - Mar 2020
Externally published	Yes
Event	2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 - Grenoble, France Duration: 9 Mar 2020 → 13 Mar 2020

Publication series

Name	Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020

Conference

Conference	2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
Country/Territory	France
City	Grenoble
Period	9/03/20 → 13/03/20

Keywords

CAD
Floating-gate
VLSI
artificial neural networks
device modeling
flash memory
memristors
neuromorphic computing

Access to Document

10.23919/DATE48585.2020.9116354

Cite this

Danial, L., Gupta, V., Pikhay, E., Roizin, Y., & Kvatinsky, S. (2020). Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. In G. Di Natale, C. Bolchini, & E-I. Vatajelu (Eds.), Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 (pp. 472-477). [9116354] (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/DATE48585.2020.9116354

Danial, L. ; Gupta, V. ; Pikhay, E. et al. / Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. editor / Giorgio Di Natale ; Cristiana Bolchini ; Elena-Ioana Vatajelu. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 472-477 (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020).

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abstract = "Memristive technology is still not mature enough for the very large-scale integration necessary to obtain practical value from neuromorphic computing. While nonvolatile floating-gate synapse transistors have been implemented in very large-scale integrated neuromorphic systems, their large footprint still constrains an upper bound on the overall performance. A two-terminal floating-gate memristive device can combine the technological maturity of the floating-gate transistor and the conceptual novelty of the memristor using a standard CMOS process. In this paper, we present a top-down computer aided design framework of the floating-gate memristive device and show its potential in neuromorphic computing. Our framework includes a Verilog-A model, small-signal schematics, a stochastic model, Monte-Carlo simulations, layout, DRC, LVS, and RC extraction.",

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author = "L. Danial and V. Gupta and E. Pikhay and Y. Roizin and S. Kvatinsky",

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doi = "10.23919/DATE48585.2020.9116354",

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Danial, L, Gupta, V, Pikhay, E, Roizin, Y & Kvatinsky, S 2020, Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. in G Di Natale, C Bolchini & E-I Vatajelu (eds), Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020., 9116354, Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020, Institute of Electrical and Electronics Engineers Inc., pp. 472-477, 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020, Grenoble, France, 9/03/20. https://doi.org/10.23919/DATE48585.2020.9116354

Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. / Danial, L.; Gupta, V.; Pikhay, E. et al.

Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. ed. / Giorgio Di Natale; Cristiana Bolchini; Elena-Ioana Vatajelu. Institute of Electrical and Electronics Engineers Inc., 2020. p. 472-477 9116354 (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Danial L, Gupta V, Pikhay E, Roizin Y, Kvatinsky S. Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing. In Di Natale G, Bolchini C, Vatajelu E-I, editors, Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 472-477. 9116354. (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020). doi: 10.23919/DATE48585.2020.9116354

Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing

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