Mirroring: A technique for pipelining semi-systolic and systolic arrays

Michael Braun; Guy Even; Thomas Walle

doi:10.1016/S0167-9260(97)00017-5

Mirroring: A technique for pipelining semi-systolic and systolic arrays

Michael Braun, Guy Even^*, Thomas Walle

^*Corresponding author for this work

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

We present a transformation, called mirroring, that enables pipelining in semi-systolic and systolic linear arrays. Mirroring doubles the throughput of semi-systolic arrays and increases the throughput of systolic arrays by one third.

Original language	English
Pages (from-to)	115-130
Number of pages	16
Journal	Integration, the VLSI Journal
Volume	23
Issue number	2
DOIs	https://doi.org/10.1016/S0167-9260(97)00017-5
State	Published - Nov 1997

Keywords

Mirroring
Pipelining
Semi-systolic arrays
Systolic arrays

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10.1016/S0167-9260(97)00017-5

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title = "Mirroring: A technique for pipelining semi-systolic and systolic arrays",

abstract = "We present a transformation, called mirroring, that enables pipelining in semi-systolic and systolic linear arrays. Mirroring doubles the throughput of semi-systolic arrays and increases the throughput of systolic arrays by one third.",

keywords = "Mirroring, Pipelining, Semi-systolic arrays, Systolic arrays",

author = "Michael Braun and Guy Even and Thomas Walle",

year = "1997",

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T2 - A technique for pipelining semi-systolic and systolic arrays

AU - Braun, Michael

AU - Even, Guy

AU - Walle, Thomas

PY - 1997/11

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N2 - We present a transformation, called mirroring, that enables pipelining in semi-systolic and systolic linear arrays. Mirroring doubles the throughput of semi-systolic arrays and increases the throughput of systolic arrays by one third.

AB - We present a transformation, called mirroring, that enables pipelining in semi-systolic and systolic linear arrays. Mirroring doubles the throughput of semi-systolic arrays and increases the throughput of systolic arrays by one third.

KW - Mirroring

KW - Pipelining

KW - Semi-systolic arrays

KW - Systolic arrays

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U2 - 10.1016/S0167-9260(97)00017-5

DO - 10.1016/S0167-9260(97)00017-5

M3 - מאמר

AN - SCOPUS:0031276873

VL - 23

SP - 115

EP - 130

JO - Integration, the VLSI Journal

JF - Integration, the VLSI Journal

SN - 0167-9260

IS - 2

ER -

Mirroring: A technique for pipelining semi-systolic and systolic arrays

Abstract

Keywords

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