Mirroring: A technique for pipelining semi-systolic and systolic arrays

Michael Braun, Guy Even*, Thomas Walle

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

We present a transformation, called mirroring, that enables pipelining in semi-systolic and systolic linear arrays. Mirroring doubles the throughput of semi-systolic arrays and increases the throughput of systolic arrays by one third.

Original languageEnglish
Pages (from-to)115-130
Number of pages16
JournalIntegration, the VLSI Journal
Volume23
Issue number2
DOIs
StatePublished - Nov 1997

Keywords

  • Mirroring
  • Pipelining
  • Semi-systolic arrays
  • Systolic arrays

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