Microprocessor system buses: A case study

The system bus must provide a standard and stable interface for peripheral devices from different vendors, and to a large extent determines the system performance. Meeting often conflicting design goals of compatibility, interoperability, technology independence, and throughput requires careful consideration of bus parameters and design alternatives. This paper is a case study of seven microprocessor system buses: ISA, EISA, MicroChannel, VME, NuBus, FutureBus, and PCI. While we emphasize modern buses, such as VME64, FutureBus+, and PCI, the veteran ISA bus is still widely used and provides some perspective for discussion and comparison. We discuss bus protocols, throughput, synchronous and asynchronous bus design, Plug-and-Pay, and multiprocessor support. Throughout the paper the focus is on design principles and tradeoffs. As for future developments in the area of microprocessor system buses, we expect that enhancements of the PCI bus will solve problems not addressed by the current PCI 2.1 specification, such as the limited way in which PCI 2.1 supports the use of the bus during long latency transactions. Further development of PCI related standards will enable the use of PCI technology in industrial applications, embedded systems, laptops, and mobile systems.