Lowering STM overhead with static analysis

Yehuda Afek*, Guy Korland, Arie Zilberstein

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Software Transactional Memory (STM) compilers commonly instrument memory accesses by transforming them into calls to STM library functions. Done naïvely, this instrumentation imposes a large overhead, slowing down the transaction execution. Many compiler optimizations have been proposed in an attempt to lower this overhead. In this paper we attempt to drive the STM overhead lower by discovering sources of sub-optimal instrumentation, and providing optimizations to eliminate them. The sources are: (1) redundant reads of memory locations that have been read before, (2) redundant writes to memory locations that will be subsequently written to, (3) redundant writeset lookups of memory locations that have not been written to, and (4) redundant writeset record-keeping for memory locations that will not be read. We describe how static analysis and code motion algorithms can detect these sources, and enable compile-time optimizations that significantly reduce the instrumentation overhead in many common cases. We implement the optimizations over a TL2 Java-based STM system, and demonstrate the effectiveness of the optimizations on various benchmarks, measuring up to 29-50% speedup in a single-threaded run, and up to 19% increased throughput in a 32-threads run.

Original languageEnglish
Title of host publicationLanguages and Compilers for Parallel Computing - 23rd International Workshop, LCPC 2010, Revised Selected Papers
Pages31-45
Number of pages15
DOIs
StatePublished - 2011
Event23rd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2010 - Houston, TX, United States
Duration: 7 Oct 20109 Oct 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume6548 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference23rd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2010
Country/TerritoryUnited States
CityHouston, TX
Period7/10/109/10/10

Keywords

  • Optimization
  • Static Analysis
  • Transactional Memory

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