Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains

Sergey Sofer; Yefim Fefer; Yoram Shapira

Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains

Sergey Sofer^*, Yefim Fefer, Yoram Shapira

^*Corresponding author for this work

Department of Electrical Engineering - Physical Eng.

Freescale Semiconductor

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Indirect electrostatic discharge stressing of a chip with multiple isolated power domains was analyzed. The stress penetrates to the victim domain via common nets having non-negligible complex impedance and via coupling of the inter-domain parasitic capacitors and in some cases may cause chip damage. Copyright

Original language	English
Title of host publication	ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis
Pages	389-392
Number of pages	4
State	Published - 2006
Event	ISTFA 2006 - 32nd International Symposium for Testing and Failure Analysis - Austin, TX, United States Duration: 12 Nov 2006 → 16 Nov 2006

Publication series

Name	Conference Proceedings from the International Symposium for Testing and Failure Analysis
Volume	2006

Conference

Conference	ISTFA 2006 - 32nd International Symposium for Testing and Failure Analysis
Country/Territory	United States
City	Austin, TX
Period	12/11/06 → 16/11/06

Cite this

Sofer, S., Fefer, Y., & Shapira, Y. (2006). Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains. In ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis (pp. 389-392). (Conference Proceedings from the International Symposium for Testing and Failure Analysis; Vol. 2006).

Sofer, Sergey ; Fefer, Yefim ; Shapira, Yoram. / Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains. ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis. 2006. pp. 389-392 (Conference Proceedings from the International Symposium for Testing and Failure Analysis).

@inproceedings{a2cd0bea0da243858edaaeedb2980ec7,

title = "Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains",

abstract = "Indirect electrostatic discharge stressing of a chip with multiple isolated power domains was analyzed. The stress penetrates to the victim domain via common nets having non-negligible complex impedance and via coupling of the inter-domain parasitic capacitors and in some cases may cause chip damage. Copyright",

author = "Sergey Sofer and Yefim Fefer and Yoram Shapira",

year = "2006",

language = "אנגלית",

isbn = "0871708442",

series = "Conference Proceedings from the International Symposium for Testing and Failure Analysis",

pages = "389--392",

booktitle = "ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis",

note = "ISTFA 2006 - 32nd International Symposium for Testing and Failure Analysis ; Conference date: 12-11-2006 Through 16-11-2006",

}

Sofer, S, Fefer, Y & Shapira, Y 2006, Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains. in ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis. Conference Proceedings from the International Symposium for Testing and Failure Analysis, vol. 2006, pp. 389-392, ISTFA 2006 - 32nd International Symposium for Testing and Failure Analysis, Austin, TX, United States, 12/11/06.

Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains. / Sofer, Sergey; Fefer, Yefim; Shapira, Yoram.
ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis. 2006. p. 389-392 (Conference Proceedings from the International Symposium for Testing and Failure Analysis; Vol. 2006).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains

AU - Sofer, Sergey

AU - Fefer, Yefim

AU - Shapira, Yoram

PY - 2006

Y1 - 2006

N2 - Indirect electrostatic discharge stressing of a chip with multiple isolated power domains was analyzed. The stress penetrates to the victim domain via common nets having non-negligible complex impedance and via coupling of the inter-domain parasitic capacitors and in some cases may cause chip damage. Copyright

AB - Indirect electrostatic discharge stressing of a chip with multiple isolated power domains was analyzed. The stress penetrates to the victim domain via common nets having non-negligible complex impedance and via coupling of the inter-domain parasitic capacitors and in some cases may cause chip damage. Copyright

UR - http://www.scopus.com/inward/record.url?scp=33847609128&partnerID=8YFLogxK

M3 - ???researchoutput.researchoutputtypes.contributiontobookanthology.conference???

AN - SCOPUS:33847609128

SN - 0871708442

SN - 9780871708441

T3 - Conference Proceedings from the International Symposium for Testing and Failure Analysis

SP - 389

EP - 392

BT - ISTFA 2006 - Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis

T2 - ISTFA 2006 - 32nd International Symposium for Testing and Failure Analysis

Y2 - 12 November 2006 through 16 November 2006

ER -

Indirect electrostatic discharge stressing mechanism in VLSI chips with multiple power supply domains

Abstract

Publication series

Conference

Other files and links

Fingerprint

Cite this