TY - JOUR
T1 - Increasing voltage utilization in split-link, four-wire inverters
AU - Liang, Jun
AU - Green, Tim C.
AU - Feng, Chunmei
AU - Weiss, George
N1 - Funding Information:
Manuscript received April 12, 2008; revised August 7, 2008 and October 6, 2008. Current version published June 10, 2009. This work was supported by the EPSRC (www.epsrc.ac.uk) under Portfolio Partnership Grant GR/S61256/01. Recommended for publication by Associate Editor J. R. Espinoza. J. Liang is with the School of Engineering, Cardiff University, Cardiff CF24 3AA, U.K. (e-mail: [email protected]). T. C. Green is with the Department of Electrical and Electronic Engineering, Imperial College, London SW7 2AZ, U.K. (e-mail: [email protected]). C. Feng is with Converteam Ltd., Stoke-on-Trent ST7 1TW, U.K. (e-mail: [email protected]). G. Weiss is with the Department of Electrical Engineering Systems, Faculty of Engineering, Tel Aviv University, Ramat Aviv 69978, Israel (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2009.2013351
PY - 2009
Y1 - 2009
N2 - Three-phase four-wire inverters, with either three-leg or four-leg topology, are useful for interfacing distributed generation to networks of unbalanced loads, but neither of the available circuit topologies is ideal. The split-link three-leg topology (with six switches) suffers from poor dc voltage utilization compared with the four-leg topology (with eight switches). The four-leg topology has an electromagnetic compatibility (EMC) difficulty because it imposes large-amplitude high-frequency voltages between the dc link busbars and ground. To obtain both good dc voltage utilization and good EMC performance, it is proposed to use a split-link inverter with an active balancing circuit (also eight switches). The balancing circuit is used to modulate the dc busbar offset voltage to make better use of the available dc-link voltage. The optimum voltage term is established to be a third harmonic term, and the dc voltage utilization is improved. A deadbeat controller supplemented with a repetitive controller is designed to give good tracking and good disturbance rejection for the busbar offset voltage. System performance is studied through an experimental test rig.
AB - Three-phase four-wire inverters, with either three-leg or four-leg topology, are useful for interfacing distributed generation to networks of unbalanced loads, but neither of the available circuit topologies is ideal. The split-link three-leg topology (with six switches) suffers from poor dc voltage utilization compared with the four-leg topology (with eight switches). The four-leg topology has an electromagnetic compatibility (EMC) difficulty because it imposes large-amplitude high-frequency voltages between the dc link busbars and ground. To obtain both good dc voltage utilization and good EMC performance, it is proposed to use a split-link inverter with an active balancing circuit (also eight switches). The balancing circuit is used to modulate the dc busbar offset voltage to make better use of the available dc-link voltage. The optimum voltage term is established to be a third harmonic term, and the dc voltage utilization is improved. A deadbeat controller supplemented with a repetitive controller is designed to give good tracking and good disturbance rejection for the busbar offset voltage. System performance is studied through an experimental test rig.
KW - Busbar offset modulation
KW - Four-wire inverter
KW - Repetitive control
KW - Voltage utilization
KW - dc link
UR - http://www.scopus.com/inward/record.url?scp=66749085567&partnerID=8YFLogxK
U2 - 10.1109/TPEL.2009.2013351
DO - 10.1109/TPEL.2009.2013351
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AN - SCOPUS:66749085567
SN - 0885-8993
VL - 24
SP - 1562
EP - 1569
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 6
ER -