TY - GEN
T1 - Improvements to the VSM current controller for better grid performance
AU - Kustanovich, Zeev
AU - Yin, Hang
AU - Weiss, George
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - Output current control is widely used as the innermost control loop of inverters, in particular virtual synchronous machines (VSM). The realization of this controller is commonly based on a PI controller working in a synchronous reference frame. The controller should mitigate the grid currents distortion and the unsteady amplitudes caused by A/D converter imperfections, measurement errors and processing delays. The elimination of any DC component in the output currents is another relevant demand. The literature indicates that the current controller parameters are usually chosen by experimental tuning. In this paper, we propose a fast current controller design procedure that provides compensation for the processing delays and eliminates the DC components of the grid-side currents. We propose to control also the zero component of the output currents (which helps in an unbalanced grid). We present the performance of the novel features of our current controller through a series of simulations, comparing it to the performance of the same controller without the proposed additional features. In addition, we compare our new current controller's design with one proposed in the literature. The results show that the new current controller leads to a better performance of the VSM in terms of output active power oscillations and stability.
AB - Output current control is widely used as the innermost control loop of inverters, in particular virtual synchronous machines (VSM). The realization of this controller is commonly based on a PI controller working in a synchronous reference frame. The controller should mitigate the grid currents distortion and the unsteady amplitudes caused by A/D converter imperfections, measurement errors and processing delays. The elimination of any DC component in the output currents is another relevant demand. The literature indicates that the current controller parameters are usually chosen by experimental tuning. In this paper, we propose a fast current controller design procedure that provides compensation for the processing delays and eliminates the DC components of the grid-side currents. We propose to control also the zero component of the output currents (which helps in an unbalanced grid). We present the performance of the novel features of our current controller through a series of simulations, comparing it to the performance of the same controller without the proposed additional features. In addition, we compare our new current controller's design with one proposed in the literature. The results show that the new current controller leads to a better performance of the VSM in terms of output active power oscillations and stability.
KW - Park transformation
KW - current loop
KW - delay compensation
KW - synchronverter
KW - virtual synchronous machine
UR - http://www.scopus.com/inward/record.url?scp=85144089819&partnerID=8YFLogxK
U2 - 10.1109/PEMC51159.2022.9962842
DO - 10.1109/PEMC51159.2022.9962842
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AN - SCOPUS:85144089819
T3 - 2022 IEEE 20th International Power Electronics and Motion Control Conference, PEMC 2022
SP - 621
EP - 626
BT - 2022 IEEE 20th International Power Electronics and Motion Control Conference, PEMC 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 20th IEEE International Power Electronics and Motion Control Conference, PEMC 2022
Y2 - 25 September 2022 through 28 September 2022
ER -