Output current control is widely used as the innermost control loop of inverters, in particular virtual synchronous machines (VSM). The realization of this controller is commonly based on a PI controller working in a synchronous reference frame. The controller should mitigate the grid currents distortion and the unsteady amplitudes caused by A/D converter imperfections, measurement errors and processing delays. The elimination of any DC component in the output currents is another relevant demand. The literature indicates that the current controller parameters are usually chosen by experimental tuning. In this paper, we propose a fast current controller design procedure that provides compensation for the processing delays and eliminates the DC components of the grid-side currents. We propose to control also the zero component of the output currents (which helps in an unbalanced grid). We present the performance of the novel features of our current controller through a series of simulations, comparing it to the performance of the same controller without the proposed additional features. In addition, we compare our new current controller's design with one proposed in the literature. The results show that the new current controller leads to a better performance of the VSM in terms of output active power oscillations and stability.