VLSI technology requires high-resolution, thin-film patterning to isolate and interconnect devices. Subtractive patterning technology, in which unwanted film areas are etched, is dominant today; however, as device dimensions are scaled, etching technology is severely challenged. Anisotropy requirements rule out simple wet etching. Dry etching is accompanied by trade-offs in etch rate, anisotropy, and selectively, and often involves other difficulties such as damage and corrosion. Patterning by additive methods avoids these problems by depositing the films only in the desired areas, without further etching. The lift-off technology reported in this paper is fundamentally different in that a self-aligned edge detection method is used to remove the film deposited on the resist sidewalls. The technique can be used with non-over-hanging resist profiles and with films which are conformally deposited. Two applications, to metalization and trench isolation, demonstrate the usefulness of the technique.