Filament Formation and the Final Resistance Modeling in Amorphous-Silicon Vertical Programmable Element

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Abstract

The transition of a vertical normally off fusible link from the nonconducting (“off”) state to the conducting (“on”) state is described by a two-step model: 1) breakdown, followed by 2) filament forming. The filament forming and resistance modeling is described here for metal/amorphous-silicon/silicon devices where the amorphous layer is produced by heavy-dose ion-implantation into crystalline silicon. The breakdown voltage of such devices is in the 8–15 V range and decreases with increasing temperature. The average breakdown field, obtained by dividing the breakdown voltage by the amorphous layer thickness, is 1.3 and 0.8 MV/cm for 77- and 300-nm-thick devices, respectively. TEM analysis shows a polycrystalline silicon filament, about 150–200 nm in diameter, with grain structure typical to explosive recrystallization. The final resistance of the programmable element was found to be a function of the forming current. It is assumed that the filament forming process is electrothermal where Joule heating results the formation of polycrystalline silicon filament with a possibilty of a molten silicon core. The heating is a function of the filament shape and the material resistivity, which by itself is a function of temperature. In this paper we assume a dominant intrinsic forming, due to process at the filament material only and not due to metal/silicon interaction, which reaches its final stage when the Joule heating is balanced by the heat outdiffusion. Three approximate models are presented here: 1) the fixed filament radius (FFR) model, 2) the growing filament radius (GFR) model, and 3) the limited power supply (LPS) model. The FFR and the GFR models assume constant current, and assume that the filament forming depends on the Joule heating and limited by the recrystallization and the heat outdiffusion. The LPS model takes into consideration the limitations of the electric power that is delivered to the device during forming. The FFR model has been proposed previously for polysilicon fuses and assumes fixed diameter, partially molten, filament forming between grains. The GFR model assumes an initial molten filament, and it takes into consideration the filament growth during the forming. The LPS model explains the role of the external circuitry on the filament formation proces. Finally, the effect of the measurement setup on the final resistance is described. It is proposed that the parasitic parallel resistance is responsible for the setup effect. A simplified model, that estimates the parasitic-capacitor discharge current contribution to the forming process, is presented and compared to the data.

Original languageEnglish
Pages (from-to)1780-1788
Number of pages9
JournalIEEE Transactions on Electron Devices
Volume40
Issue number10
DOIs
StatePublished - Oct 1993
Externally publishedYes

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