Fabrication of electroless CoWP/NiB diffusion barrier layer on SiO 2 for ULSI Devices

Tetsuya Osaka*, Hitoshi Aramaki, Masahiro Yoshino, Kazuyoshi Ueno, Itsuaki Matsuda, Yosi Shacham-Diamand

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

24 Scopus citations

Abstract

We investigated the electroless CoWP/NiB diffusion barrier layer for ultralarge-scale integration (ULSI) interconnection by forming the immobilizing Pd catalyst on an organosilane layer. When the electroless CoWP film was formed directly on a Pd-activated organosilane layer, it became islandlike and did not form a continuous layer. When it was formed on an electroless NiB deposited on a Pd-activated organosilane layer, the electroless CoWP film was uniform and formed a continuous layer 10 nm thick. The transmission electron microscopy images of the interfaces of Cu/CoWP/NiB/ SiO2 showed that, at an annealing temperature up to 400°C for 30 min, the interfaces remained unchanged and clear, showing no trace of Cu diffusion into the SiO2 substrate. In-plane X-ray diffraction patterns indicated that the CoWP/NiB film had an amorphous structure and was stable against heat-treatment up to 500°C for 30 min. An evaluation of sheet resistance measurements suggested that the CoWP/NiB film shows appropriate barrier properties for Cu diffusion up to 400°C. The CoWP/NiB film was used as a seed for electroless Cu plating. Trenches 100 nm wide were coated with a 10 nm CoWP/NiB barrier followed by successful trench filling by electroless Cu plating.

Original languageEnglish
Pages (from-to)H707-H710
JournalJournal of the Electrochemical Society
Volume156
Issue number9
DOIs
StatePublished - 2009

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