Abstract
Characteristics of electroless Cu, Co and Ni alloys for a multilevel metallization as well as for local interconnects and silicide formations for sub-0.5 μm ULSIs are presented. An integration of the electroless Cu and CoWP multilayers in an ULSI damascene process for the quarter-micron Cu interconnects of aspect ratio 4:1 is discussed. The following techniques are involved in this process: conformal electroless deposition of CoWP barrier on the thin sputtered Co seed layer, electroless Cu deposition directly onto CoWP barrier to fill a deep trench or a via, removal of the excess barrier and Cu on the oxide by chemical mechanical polishing, Pd activation of the Cu surface and selective electroless CoWP deposition onto Pd-activated in-laid Cu lines to prevent Cu oxidation and corrosion. The study of the selective electroless NiP deposition on Si for silicide formations for sub-0.25μm ULSI technology is also presented.
Original language | English |
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Pages (from-to) | 21-32 |
Number of pages | 12 |
Journal | Proceedings of SPIE - The International Society for Optical Engineering |
Volume | 3214 |
DOIs | |
State | Published - 1997 |
Externally published | Yes |
Event | Multilevel Interconnect Technology - Austin, TX, United States Duration: 1 Oct 1997 → 1 Oct 1997 |
Keywords
- Barrier layer
- Cu interconnects
- Electroless deposition
- NiP and CoWP alloys