Electroless Cu and barrier layers for sub-half micron multilevel interconnects

Sergey Lopatin, Yosi Shacham-Diamand, Valery Dubin, P. K. Vasudev

Research output: Contribution to journalConference articlepeer-review

Abstract

Characteristics of electroless Cu, Co and Ni alloys for a multilevel metallization as well as for local interconnects and silicide formations for sub-0.5 μm ULSIs are presented. An integration of the electroless Cu and CoWP multilayers in an ULSI damascene process for the quarter-micron Cu interconnects of aspect ratio 4:1 is discussed. The following techniques are involved in this process: conformal electroless deposition of CoWP barrier on the thin sputtered Co seed layer, electroless Cu deposition directly onto CoWP barrier to fill a deep trench or a via, removal of the excess barrier and Cu on the oxide by chemical mechanical polishing, Pd activation of the Cu surface and selective electroless CoWP deposition onto Pd-activated in-laid Cu lines to prevent Cu oxidation and corrosion. The study of the selective electroless NiP deposition on Si for silicide formations for sub-0.25μm ULSI technology is also presented.

Original languageEnglish
Pages (from-to)21-32
Number of pages12
JournalProceedings of SPIE - The International Society for Optical Engineering
Volume3214
DOIs
StatePublished - 1997
Externally publishedYes
EventMultilevel Interconnect Technology - Austin, TX, United States
Duration: 1 Oct 19971 Oct 1997

Keywords

  • Barrier layer
  • Cu interconnects
  • Electroless deposition
  • NiP and CoWP alloys

Fingerprint

Dive into the research topics of 'Electroless Cu and barrier layers for sub-half micron multilevel interconnects'. Together they form a unique fingerprint.

Cite this