Abstract
Electrostatically formed nanowire (EFN)-based transistors have recently been proposed as a single device with multiplexer functionality. In these transistors, the conduction path between source and one of the drains is determined by the bias applied to the two junction-side gates. By applying a nonsymmetric bias on the side gates, the lateral position of the EFN is controlled. We present a detailed analysis of the different states of the multiple state electrostatically formed nanowire transistor device, the transient time between them and the power exerted during each transition. The dependence of transition time between states and leakage currents in cutoff states on different geometry parameters is also presented.
Original language | English |
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Article number | 7786846 |
Pages (from-to) | 571-578 |
Number of pages | 8 |
Journal | IEEE Transactions on Electron Devices |
Volume | 64 |
Issue number | 2 |
DOIs | |
State | Published - Feb 2017 |
Keywords
- FETs
- Logic devices
- Nanowires
- Transient