A novel technique for the characterization of hot-electron-induced degradation in p-channel MOS devices is described. By measuring the gate to source/drain capacitance both before and after constant bias stressing, a capacitance difference curve can be generated from which the amount of electrically active sites is extracted. Detrapping of trapped charge has been observed and is shown to be sensitive to measurement conditions. Two-dimensional device simulations have been performed to analyze and confirm these experimental results.
|Number of pages||4|
|Journal||Technical Digest - International Electron Devices Meeting|
|State||Published - Dec 1990|
|Event||1990 International Electron Devices Meeting - San Francisco, CA, USA|
Duration: 9 Dec 1990 → 12 Dec 1990