Deterministic rateless codes for BSC [extended abstract]

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A rateless code encodes a finite length information word into an infinitely long codeword such that longer prefixes of the codeword can tolerate a larger fraction of errors. A rateless code achieves capacity for a family of channels if, for every channel in the family, reliable communication is obtained by a prefix of the code whose rate is arbitrarily close to the channel's capacity. As a result, a universal encoder can communicate over all channels in the family while simultaneously achieving optimal communication overhead. In this paper, we construct the first deterministic rateless code for the binary symmetric channel. Our code can be encoded and decoded in O(β) time per bit and in almost logarithmic parallel time of O(β log n), where β is any (arbitrarily slow) super-constant function. Furthermore, the error probability of our code is almost exponentially small exp(-Ω(n/β)). Previous rateless codes are probabilistic (i.e., based on code ensembles), require polynomial time per bit for decoding, and have inferior asymptotic error probabilities. Our main technical contribution is a constructive proof for the existence of an infinite generating matrix that each of its prefixes induce a weight distribution that approximates the expected weight distribution of a random linear code.

Original languageEnglish
Title of host publicationITCS 2015 - Proceedings of the 6th Innovations in Theoretical Computer Science
PublisherAssociation for Computing Machinery, Inc
Pages31-40
Number of pages10
ISBN (Electronic)9781450333337
DOIs
StatePublished - 11 Jan 2015
Event6th Conference on Innovations in Theoretical Computer Science, ITCS 2015 - Rehovot, Israel
Duration: 11 Jan 201513 Jan 2015

Publication series

NameITCS 2015 - Proceedings of the 6th Innovations in Theoretical Computer Science

Conference

Conference6th Conference on Innovations in Theoretical Computer Science, ITCS 2015
Country/TerritoryIsrael
CityRehovot
Period11/01/1513/01/15

Keywords

  • Binary symmetric channel
  • Capacity achieving error correcting code
  • Rateless codes

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