Dedicated Design Rules for Memory Modules

Yakov Roizin, Evgeny Pikhay, Eitan N. Shauly

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

The nominal voltages are often higher than for the core CMOS, and the physical design of the devices is different. The periphery devices’ DRs are typically looser than for CMOS counterparts operating at the same voltages since the duty cycles for the peripheral devices of the memories are in most cases much smaller compared with typical CMOS lifespan dictated by the reliability requirements. Stand-alone memories can hardly be considered a business priority of a specialty foundry. The main goal of developing and/ or implementing NVM solutions in the foundry business is the enablement of feature-rich production platforms. Specific applications require large amounts of high-performance, dense and low-cost non-volatile memories, to be easily integrated into the standard CMOS technology. The electron wind pushes positive ions, from the cathode towards the anode. Simultaneously, self-heating of the silicide layer increases the temperature of polysilicon that conducts consequently more current and enhanced the silicide electromigration, until the silicide bridge is broken.

Original languageEnglish
Title of host publicationDesign Rules in a Semiconductor Foundry
PublisherJenny Stanford Publishing
Pages449-510
Number of pages62
ISBN (Electronic)9781000631357
ISBN (Print)9789814968003
DOIs
StatePublished - 1 Jan 2022

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