TY - GEN
T1 - Decreasing error floor in LDPC codes by parity-check matrix extensions
AU - Fainzilber, Orner
AU - Sharon, Eran
AU - Litsyn, Simon
PY - 2009
Y1 - 2009
N2 - High error floors in optimized irregular LDPC codes limit their usage in applications that require low error rates. We introduce new methods for lowering the error floor of LDPC codes, based on enhancing the code's parity-check matrix with additional linearly dependent and independent parity-checks. We prove NP hardness of certain optimization problems related to proposed methods and provide upper bound on the number of parity-checks that need to be added. We show that the proposed methods can lower the error floor of the code significantly, by several orders of magnitude, at negligible or no rate penalty.
AB - High error floors in optimized irregular LDPC codes limit their usage in applications that require low error rates. We introduce new methods for lowering the error floor of LDPC codes, based on enhancing the code's parity-check matrix with additional linearly dependent and independent parity-checks. We prove NP hardness of certain optimization problems related to proposed methods and provide upper bound on the number of parity-checks that need to be added. We show that the proposed methods can lower the error floor of the code significantly, by several orders of magnitude, at negligible or no rate penalty.
UR - http://www.scopus.com/inward/record.url?scp=70449490860&partnerID=8YFLogxK
U2 - 10.1109/ISIT.2009.5205738
DO - 10.1109/ISIT.2009.5205738
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AN - SCOPUS:70449490860
SN - 9781424443130
T3 - IEEE International Symposium on Information Theory - Proceedings
SP - 374
EP - 378
BT - 2009 IEEE International Symposium on Information Theory, ISIT 2009
T2 - 2009 IEEE International Symposium on Information Theory, ISIT 2009
Y2 - 28 June 2009 through 3 July 2009
ER -