Computer model of the trapping media in micro FLASH® memory cells

David Fuks, Arnold Kiv*, Tatiana Maximova, Rachel Bibi, Yakov Roizin, Micha Gutman

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


A computer model for the dielectric trapping layer in the microFLASH memory transistor is developed. Due to local trapping of injected charges in corresponding devices the problem of lateral charge migration in the plane parallel to the transistor channel becomes of principal importance. Molecular Dynamics method was used to design a cluster of atoms with dielectric properties and to perform computer simulation of the redistribution of the injected charges in the program/erase processes. The charge distributions obtained on the basis of proposed model are strongly influenced by Coulomb repulsion between the trapped charge carriers. This effect leads to non-Gaussian discrete space distribution of trapped charges and significantly influences the endurance of the memory device. We demonstrate that large densities of traps and injected carriers are strongly correlated, limiting the amount of charge that can be accumulated in the programming process. The model allows select optimum parameters of the trapping layer to ensure high retention properties of the memory cells.

Original languageEnglish
Pages (from-to)21-32
Number of pages12
JournalJournal of Computer-Aided Materials Design
Issue number1
StatePublished - 2002
Externally publishedYes


  • Carriers migration
  • Computer model of dielectric
  • Coulomb correlation effects
  • Endurance-retention prognosis
  • Limits for programming level
  • MicroFLASH memory cells
  • Molecular dynamics simulation
  • ONO structures
  • Parasitic trapping
  • Programming process
  • SONOS transistors
  • Silicon nitride
  • Thermalization of hot carriers
  • Trapping and scattering centers


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