CMOS Compatible Electrostatically Formed Nanowire Transistor for Efficient Sensing of Temperature

Klimentiy Shimanovich; Tom Coen; Yonatan Vaknin; Alex Henning; Joseph Hayon; Yakov Roizin; Yossi Rosenwaks

doi:10.1109/TED.2017.2727548

CMOS Compatible Electrostatically Formed Nanowire Transistor for Efficient Sensing of Temperature

Klimentiy Shimanovich^*, Tom Coen, Yonatan Vaknin, Alex Henning, Joseph Hayon, Yakov Roizin, Yossi Rosenwaks

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

7 Scopus citations

Abstract

A novel electrostatically formed nano-wire (EFN) transistor for temperature sensing is presented. The device is a silicon-on-insulator multigate field-effect transistor, in which a nanowire-shaped conducting channel vertical position and area are controlled by the bias applied to the back gate, and two junction-side gates. Our measurements depict temperature sensitivity of 7.7%/K for EFN transistors which is among the best reported values for semiconductor temperature sensing devices TMOS and FET's. Optimal operational voltage biases and currents for the EFN transistor regimes are evaluated from measurements and analyzed using three dimensional (3D) electrostatic device simulations and developed analytical model.

Original language	English
Article number	8000690
Pages (from-to)	3836-3840
Number of pages	5
Journal	IEEE Transactions on Electron Devices
Volume	64
Issue number	9
DOIs	https://doi.org/10.1109/TED.2017.2727548
State	Published - Sep 2017

Keywords

CMOS temperature sensor
electrostatically formed nanowire (EFN)
multiple gates field-effect transistor

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10.1109/TED.2017.2727548

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title = "CMOS Compatible Electrostatically Formed Nanowire Transistor for Efficient Sensing of Temperature",

abstract = "A novel electrostatically formed nano-wire (EFN) transistor for temperature sensing is presented. The device is a silicon-on-insulator multigate field-effect transistor, in which a nanowire-shaped conducting channel vertical position and area are controlled by the bias applied to the back gate, and two junction-side gates. Our measurements depict temperature sensitivity of 7.7%/K for EFN transistors which is among the best reported values for semiconductor temperature sensing devices TMOS and FET's. Optimal operational voltage biases and currents for the EFN transistor regimes are evaluated from measurements and analyzed using three dimensional (3D) electrostatic device simulations and developed analytical model.",

keywords = "CMOS temperature sensor, electrostatically formed nanowire (EFN), multiple gates field-effect transistor",

author = "Klimentiy Shimanovich and Tom Coen and Yonatan Vaknin and Alex Henning and Joseph Hayon and Yakov Roizin and Yossi Rosenwaks",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.",

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doi = "10.1109/TED.2017.2727548",

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T1 - CMOS Compatible Electrostatically Formed Nanowire Transistor for Efficient Sensing of Temperature

AU - Shimanovich, Klimentiy

AU - Coen, Tom

AU - Vaknin, Yonatan

AU - Henning, Alex

AU - Hayon, Joseph

AU - Roizin, Yakov

AU - Rosenwaks, Yossi

PY - 2017/9

Y1 - 2017/9

N2 - A novel electrostatically formed nano-wire (EFN) transistor for temperature sensing is presented. The device is a silicon-on-insulator multigate field-effect transistor, in which a nanowire-shaped conducting channel vertical position and area are controlled by the bias applied to the back gate, and two junction-side gates. Our measurements depict temperature sensitivity of 7.7%/K for EFN transistors which is among the best reported values for semiconductor temperature sensing devices TMOS and FET's. Optimal operational voltage biases and currents for the EFN transistor regimes are evaluated from measurements and analyzed using three dimensional (3D) electrostatic device simulations and developed analytical model.

AB - A novel electrostatically formed nano-wire (EFN) transistor for temperature sensing is presented. The device is a silicon-on-insulator multigate field-effect transistor, in which a nanowire-shaped conducting channel vertical position and area are controlled by the bias applied to the back gate, and two junction-side gates. Our measurements depict temperature sensitivity of 7.7%/K for EFN transistors which is among the best reported values for semiconductor temperature sensing devices TMOS and FET's. Optimal operational voltage biases and currents for the EFN transistor regimes are evaluated from measurements and analyzed using three dimensional (3D) electrostatic device simulations and developed analytical model.

KW - CMOS temperature sensor

KW - electrostatically formed nanowire (EFN)

KW - multiple gates field-effect transistor

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CMOS Compatible Electrostatically Formed Nanowire Transistor for Efficient Sensing of Temperature

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