Abstract
We introduce a new PLA-based decoder architecture for random-access runtime decompression of compressed instruction memory in embedded systems. The compression method employs class-based coding. The symbol codebook used for decompression is fully programmable; thus, good compression may be achieved by adapting the codebook to the symbol frequency statistics of the target binary program. We show that this new class-based decoder architecture can be extended to provide high throughput decompression.
Original language | English |
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Pages (from-to) | 1495-1500 |
Number of pages | 6 |
Journal | IEEE Transactions on Computers |
Volume | 52 |
Issue number | 11 |
DOIs | |
State | Published - Nov 2003 |
Keywords
- Code compression
- Decompressor architecture
- Embedded processors