Class-Based Decompressor Design for Compressed Instruction Memory in Embedded Processors

Shlomo Weiss, Shay Beren

Research output: Contribution to journalArticlepeer-review

Abstract

We introduce a new PLA-based decoder architecture for random-access runtime decompression of compressed instruction memory in embedded systems. The compression method employs class-based coding. The symbol codebook used for decompression is fully programmable; thus, good compression may be achieved by adapting the codebook to the symbol frequency statistics of the target binary program. We show that this new class-based decoder architecture can be extended to provide high throughput decompression.

Original languageEnglish
Pages (from-to)1495-1500
Number of pages6
JournalIEEE Transactions on Computers
Volume52
Issue number11
DOIs
StatePublished - Nov 2003

Keywords

  • Code compression
  • Decompressor architecture
  • Embedded processors

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