TY - GEN
T1 - Capacitive matrix converters
AU - Beck, Y.
AU - Singer, S.
PY - 2008
Y1 - 2008
N2 - This paper describes three ideal topologies of switched-capacitor converters, taking into account integration considerations and multiple DC voltage ratios. First, the ideal continuous capacitor idea is described, and then a Matrix of Capacitors configuration is proposed. This configuration is based on rectangular matrices of capacitors charging and discharging in transposed configuration for achieving the input/output DC voltage ratio. The third topology is The General Transposed Series-Parallel configuration. This is a modification with a discrete number of capacitors. The configuration is based on parallel brunches of series capacitors in the charging state and series elements of parallel capacitors in the discharging state. This topology is suitable for fine tuning in the DC voltage ratios. The Matrix and the Transposed Series-Parallel topologies are compared for an input/output ratio of 1.1. In the later topology, fewer components are required for the assumed ratio. Simulation is performed for 3 elements in the Transposed Series-Parallel topology, where each element consists of two dual identical capacitors for the elimination of external large capacitors.
AB - This paper describes three ideal topologies of switched-capacitor converters, taking into account integration considerations and multiple DC voltage ratios. First, the ideal continuous capacitor idea is described, and then a Matrix of Capacitors configuration is proposed. This configuration is based on rectangular matrices of capacitors charging and discharging in transposed configuration for achieving the input/output DC voltage ratio. The third topology is The General Transposed Series-Parallel configuration. This is a modification with a discrete number of capacitors. The configuration is based on parallel brunches of series capacitors in the charging state and series elements of parallel capacitors in the discharging state. This topology is suitable for fine tuning in the DC voltage ratios. The Matrix and the Transposed Series-Parallel topologies are compared for an input/output ratio of 1.1. In the later topology, fewer components are required for the assumed ratio. Simulation is performed for 3 elements in the Transposed Series-Parallel topology, where each element consists of two dual identical capacitors for the elimination of external large capacitors.
UR - http://www.scopus.com/inward/record.url?scp=56649103990&partnerID=8YFLogxK
U2 - 10.1109/COMPEL.2008.4634705
DO - 10.1109/COMPEL.2008.4634705
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AN - SCOPUS:56649103990
SN - 9781424425518
T3 - 11th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2008
BT - 11th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2008
PB - IEEE Computer Society
T2 - 11th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2008
Y2 - 17 August 2008 through 20 August 2008
ER -