TY - JOUR
T1 - Arbitrary error detection in combinational circuits by using partitioning
AU - Keren, Osnat
AU - Levin, Ilya
AU - Ostrovsky, Vladimir
AU - Abramov, Beni
PY - 2008
Y1 - 2008
N2 - The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.
AB - The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuits. It does not require any redundant coding variables; instead, it utilizes a sub-set of input variables. These variables are transferred directly into a checker providing the arbitrary error detection. The paper develops and studies a method for selecting an optimized sub-set of such variables. Benchmark results show efficiency of the proposed approach.
UR - http://www.scopus.com/inward/record.url?scp=67649960492&partnerID=8YFLogxK
U2 - 10.1109/DFT.2008.34
DO - 10.1109/DFT.2008.34
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AN - SCOPUS:67649960492
SN - 1550-5774
SP - 361
EP - 369
JO - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
JF - Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
M1 - 4641192
T2 - 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2008
Y2 - 1 October 2008 through 3 October 2008
ER -