A VLSI field-programmable mixed-signal array to perform neural signal processing and neural modeling in a prosthetic system

Simeon A. Bamford, Roni Hogri, Andrea Giovannucci, Aryeh H. Taub, Ivan Herreros, Paul F.M.J. Verschure, Matti Mintz, Paolo Del Giudice

Research output: Contribution to journalArticlepeer-review

Abstract

A very-large-scale integration field-programmable mixed-signal array specialized for neural signal processing and neural modeling has been designed. This has been fabricated as a core on a chip prototype intended for use in an implantable closed-loop prosthetic system aimed at rehabilitation of the learning of a discrete motor response. The chosen experimental context is cerebellar classical conditioning of the eye-blink response. The programmable system is based on the intimate mixing of switched capacitor analog techniques with low speed digital computation; power saving innovations within this framework are presented. The utility of the system is demonstrated by the implementation of a motor classical conditioning model applied to eye-blink conditioning in real time with associated neural signal processing. Paired conditioned and unconditioned stimuli were repeatedly presented to an anesthetized rat and recordings were taken simultaneously from two precerebellar nuclei. These paired stimuli were detected in real time from this multichannel data. This resulted in the acquisition of a trigger for a well-timed conditioned eye-blink response, and repetition of unpaired trials constructed from the same data led to the extinction of the conditioned response trigger, compatible with natural cerebellar learning in awake animals.

Original languageEnglish
Article number6177267
Pages (from-to)455-467
Number of pages13
JournalIEEE Transactions on Neural Systems and Rehabilitation Engineering
Volume20
Issue number4
DOIs
StatePublished - 2012

Keywords

  • Brain-machine interface
  • closed-loop
  • field-programmable
  • learning
  • neuroelectrophysiology
  • neuroprothesis
  • prosthesis
  • very-large-scale integration (VLSI)

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