TY - GEN
T1 - A promising semantics for relaxed-memory concurrency
AU - Kang, Jeehoon
AU - Hur, Chung Kil
AU - Lahav, Ori
AU - Vafeiadis, Viktor
AU - Dreyer, Derek
N1 - Publisher Copyright:
© 2017 ACM.
PY - 2017/1/1
Y1 - 2017/1/1
N2 - Despite many years of research, it has proven very difficult to develop a memory model for concurrent programming languages that adequately balances the conflicting desiderata of programmers, compilers, and hardware. In this paper, we propose the first relaxed memory model that (1) accounts for a broad spectrum of features from the C++11 concurrency model, (2) is implementable, in the sense that it provably validates many standard compiler optimizations and reorderings, as well as standard compilation schemes to x86-TSO and Power, (3) justifies simple invariant-based reasoning, thus demonstrating the absence of bad "out-of-thin-air" behaviors, (4) supports "DRF" guarantees, ensuring that programmers who use sufficient synchronization need not understand the full complexities of relaxed-memory semantics, and (5) defines the semantics of racy programs without relying on undefined behaviors, which is a prerequisite for applicability to type-safe languages like Java. The key novel idea behind our model is the notion of promises: a thread may promise to execute a write in the future, thus enabling other threads to read from that write out of order. Crucially, to prevent out-of-thin-air behaviors, a promise step requires a threadlocal certification that it will be possible to execute the promised write even in the absence of the promise. To establish confidence in our model, we have formalized most of our key results in Coq.
AB - Despite many years of research, it has proven very difficult to develop a memory model for concurrent programming languages that adequately balances the conflicting desiderata of programmers, compilers, and hardware. In this paper, we propose the first relaxed memory model that (1) accounts for a broad spectrum of features from the C++11 concurrency model, (2) is implementable, in the sense that it provably validates many standard compiler optimizations and reorderings, as well as standard compilation schemes to x86-TSO and Power, (3) justifies simple invariant-based reasoning, thus demonstrating the absence of bad "out-of-thin-air" behaviors, (4) supports "DRF" guarantees, ensuring that programmers who use sufficient synchronization need not understand the full complexities of relaxed-memory semantics, and (5) defines the semantics of racy programs without relying on undefined behaviors, which is a prerequisite for applicability to type-safe languages like Java. The key novel idea behind our model is the notion of promises: a thread may promise to execute a write in the future, thus enabling other threads to read from that write out of order. Crucially, to prevent out-of-thin-air behaviors, a promise step requires a threadlocal certification that it will be possible to execute the promised write even in the absence of the promise. To establish confidence in our model, we have formalized most of our key results in Coq.
KW - C++11
KW - Operational semantics
KW - Weak memory models
UR - http://www.scopus.com/inward/record.url?scp=85015286201&partnerID=8YFLogxK
U2 - 10.1145/3009837.3009850
DO - 10.1145/3009837.3009850
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AN - SCOPUS:85015286201
T3 - Conference Record of the Annual ACM Symposium on Principles of Programming Languages
SP - 175
EP - 189
BT - POPL 2017 - Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages
A2 - Gordon, Andrew D.
A2 - Castagna, Giuseppe
PB - Association for Computing Machinery
T2 - 44th ACM SIGPLAN Symposium on Principles of Programming Languages, POPL 2017
Y2 - 15 January 2017 through 21 January 2017
ER -