A 9th harmonic F-band 65-nm CMOS low power active multiplier

Firass Mustafa, Eran Socher

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A novel high factor multiplication circuit is introduced in this paper, generating F-band frequency signal out of X-band input. The 9th harmonic of the input is generated by a single differential common source stage, subsequently amplified by a transformer-coupled CS F-band power amplifier. The circuit, implemented in 65-nm CMOS consumes only 160mW of DC power and a small area of 0.4 mm2 including pads, achieving up to +9dBm output power at 110.25GHz, 16.1% 3-dB bandwidth in the range of 97-114 GHz and harmonic suppression better than 25 dBc.

Original languageEnglish
Title of host publication2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-4
Number of pages4
ISBN (Electronic)9781538631690
DOIs
StatePublished - 28 Jun 2017
Event2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017 - Tel-Aviv, Israel
Duration: 13 Nov 201715 Nov 2017

Publication series

Name2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
Volume2017-November

Conference

Conference2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems, COMCAS 2017
Country/TerritoryIsrael
CityTel-Aviv
Period13/11/1715/11/17

Keywords

  • Active multipliers
  • CMOS
  • High harmonic generation
  • Mm-wave
  • Transformer coupling

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