A 300GHz wirelessly locked 2×3 array radiating 5.4dBm with 5.1% DC-to-RF efficiency in 65nm CMOS

Samuel Jameson, Eliezer Halpern, Eran Socher

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

CMOS technology innovations over the last decades opened doors to the possibility of designing fully integrated systems in CMOS at THz frequencies. Small antenna sizes at THz frequencies make CMOS and silicon attractive for steerable 2D transmitter and receiver arrays. Previous works successfully showed THz-source arrays with the use of on-chip antennas [1-5]. However, it is still a challenge implementing such arrays that are frequency and phase locked, with significant radiated power and efficiency in standard CMOS without costly additions. In this work we propose a scalable radiating-transmitter approach in 65nm CMOS that achieves a radiated power of +5.4dBm at 0.3THz using only a 2×3 on-chip array, an EIRP of +22dBm and 5.1% of radiated-power-to-DC power efficiency.

Original languageEnglish
Title of host publication2016 IEEE International Solid-State Circuits Conference, ISSCC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages348-349
Number of pages2
ISBN (Electronic)9781467394666
DOIs
StatePublished - 23 Feb 2016
Event63rd IEEE International Solid-State Circuits Conference, ISSCC 2016 - San Francisco, United States
Duration: 31 Jan 20164 Feb 2016

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume59
ISSN (Print)0193-6530

Conference

Conference63rd IEEE International Solid-State Circuits Conference, ISSCC 2016
Country/TerritoryUnited States
CitySan Francisco
Period31/01/164/02/16

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