TY - JOUR
T1 - A 280-GHz Digitally Controlled Four Port Chip-Scale Dielectric Resonator Antenna Transmitter with DiCAD True Time Delay
AU - Buadana, Nadav
AU - Jameson, Samuel
AU - Socher, Eran
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2020
Y1 - 2020
N2 - A 280-GHz, fully integrated and digitally controlled multiport coherent radiator is presented. The silicon die acts as a chip-scale dielectric resonator antenna (CSDRA) and is excited by four differential loop inductors. The chip incorporates a balun for an X-band input signal, a 1-4 ultracompact differential Wilkinson splitter, and four × 27 active multipliers chain (AMC), which drive the four exciting elements. High-resolution, digitally controlled true time delay (TTD) elements, based on digitally controlled artificial dielectric transmission lines (DiCAD), are used to calibrate the variations between channels to optimize overall broadside radiated power and enable beam steering of ±15°. High-resolution DACs are used to accurately set the bias through a 3-wire SPI module. Fabricated in 65-nm CMOS, the 1.4× 2-mm2 chip achieves a record EIRP of +21 dBm, a TRP of +8.5 dBm, and a power density of 2.25 mW/mm2 with 0.72% total efficiency, without using any external lens, superstrate, or postprocessing.
AB - A 280-GHz, fully integrated and digitally controlled multiport coherent radiator is presented. The silicon die acts as a chip-scale dielectric resonator antenna (CSDRA) and is excited by four differential loop inductors. The chip incorporates a balun for an X-band input signal, a 1-4 ultracompact differential Wilkinson splitter, and four × 27 active multipliers chain (AMC), which drive the four exciting elements. High-resolution, digitally controlled true time delay (TTD) elements, based on digitally controlled artificial dielectric transmission lines (DiCAD), are used to calibrate the variations between channels to optimize overall broadside radiated power and enable beam steering of ±15°. High-resolution DACs are used to accurately set the bias through a 3-wire SPI module. Fabricated in 65-nm CMOS, the 1.4× 2-mm2 chip achieves a record EIRP of +21 dBm, a TRP of +8.5 dBm, and a power density of 2.25 mW/mm2 with 0.72% total efficiency, without using any external lens, superstrate, or postprocessing.
KW - CMOS
KW - THz
KW - dielectric resonator antenna
KW - digitally controlled artificial dielectric transmission line (DiCAD)
KW - frequency multiplier
KW - mm-wave
KW - true time delay (TTD)
UR - http://www.scopus.com/inward/record.url?scp=85090951594&partnerID=8YFLogxK
U2 - 10.1109/LSSC.2020.3022562
DO - 10.1109/LSSC.2020.3022562
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AN - SCOPUS:85090951594
SN - 2573-9603
VL - 3
SP - 454
EP - 457
JO - IEEE Solid-State Circuits Letters
JF - IEEE Solid-State Circuits Letters
M1 - 9187850
ER -