95 GHz down converting mixers in CMOS 65 nm technology

J. Elkind, E. Socher

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents three single balanced down-converting mixer designs in CMOS 65 nm technology. The three designs operate at 95 GHz and reach a maximum conversion gain of 8, 6.9 and 10.2 dB respectively. Due to the use of single balanced topology, the designs occupy a relatively small core area of 0.89×0.51, 0.078×0.14 and 0.053×0.17 mm2 and their DC power consumption is only 26, 29 and 12.4 mW.

Original languageEnglish
Title of host publication2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479974733
DOIs
StatePublished - 17 Dec 2015
EventIEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2015 - Tel-Aviv, Israel
Duration: 2 Nov 20154 Nov 2015

Publication series

Name2015 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2015

Conference

ConferenceIEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2015
Country/TerritoryIsrael
CityTel-Aviv
Period2/11/154/11/15

Keywords

  • Imaging
  • mixer
  • mmW
  • noise figure
  • receivers

Fingerprint

Dive into the research topics of '95 GHz down converting mixers in CMOS 65 nm technology'. Together they form a unique fingerprint.

Cite this