52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

R. Sananes; E. Socher

doi:10.1049/el.2011.2788

52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

R. Sananes, E. Socher^*

^*Corresponding author for this work

School of Electrical Engineering

Tel Aviv University

Research output: Contribution to journal › Article › peer-review

19 Scopus citations

Abstract

A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm ² in 90nm CMOS technology.

Original language	English
Pages (from-to)	71-72
Number of pages	2
Journal	Electronics Letters
Volume	48
Issue number	2
DOIs	https://doi.org/10.1049/el.2011.2788
State	Published - 19 Jan 2012

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10.1049/el.2011.2788

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abstract = "A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm 2 in 90nm CMOS technology.",

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AB - A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm 2 in 90nm CMOS technology.

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52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

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