52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

R. Sananes; E. Socher

doi:10.1049/el.2011.2788

52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

R. Sananes, E. Socher^*

^*Corresponding author for this work

School of Electrical Engineering

Tel Aviv University

Research output: Contribution to journal › Article › peer-review

18 Scopus citations

Abstract

A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm ² in 90nm CMOS technology.

Original language	English
Pages (from-to)	71-72
Number of pages	2
Journal	Electronics Letters
Volume	48
Issue number	2
DOIs	https://doi.org/10.1049/el.2011.2788
State	Published - 19 Jan 2012

Access to Document

10.1049/el.2011.2788

Cite this

@article{e1fc4afd8b7e43ef97619397e352beb0,

title = "52-75 GHz wideband low-noise amplifier in 90nm CMOS technology",

abstract = "A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm 2 in 90nm CMOS technology.",

author = "R. Sananes and E. Socher",

year = "2012",

month = jan,

day = "19",

doi = "10.1049/el.2011.2788",

language = "אנגלית",

volume = "48",

pages = "71--72",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "John Wiley & Sons Inc.",

number = "2",

}

TY - JOUR

T1 - 52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

AU - Sananes, R.

AU - Socher, E.

PY - 2012/1/19

Y1 - 2012/1/19

N2 - A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm 2 in 90nm CMOS technology.

AB - A three-stage single-ended low-noise amplifier covering almost the entire V-band is presented. The design employs three cascade single-ended stages with pi-sections for wideband interstage matching and source degeneration at the first stage. The amplifier achieves a peak gain of 14dB and minimum noise figure of 4.8dB. A record 3dB bandwidth of 37 is achieved with power consumption of 32mW and core silicon area of 0.065mm 2 in 90nm CMOS technology.

UR - http://www.scopus.com/inward/record.url?scp=84857251575&partnerID=8YFLogxK

U2 - 10.1049/el.2011.2788

DO - 10.1049/el.2011.2788

M3 - ???researchoutput.researchoutputtypes.contributiontojournal.article???

AN - SCOPUS:84857251575

SN - 0013-5194

VL - 48

SP - 71

EP - 72

JO - Electronics Letters

JF - Electronics Letters

IS - 2

ER -

52-75 GHz wideband low-noise amplifier in 90nm CMOS technology

Abstract

Access to Document

Other files and links

Fingerprint

Cite this